1. Field of the Invention
The present invention relates to a photomask evaluation method, a photomask evaluation apparatus and a semiconductor device manufacturing method associated with the manufacture of a photomask.
2. Description of the Related Art
Recently, problems in a photolithographic step used in a semiconductor manufacturing process have been increasingly prominent. There are increasing demands for miniaturization in the photolithographic step along with advancing miniaturization of semiconductor devices. Design rules for the devices have already reached a miniaturization of 55 nm, and pattern dimensional accuracy to be controlled is required to be 5 nm or less, which is extremely strict accuracy. Moreover, mask patterns are subjected to an optical proximity effect correction (OPC), and therefore have extremely complicated shapes.
Thus, one-dimensional dimensional uniformity tests such as a simple measurement of a pattern line width and a measurement of a hole diameter as have heretofore been carried out are insufficient, and two-dimensional dimensional management has been demanded. In response to this, a method has been employed wherein an image of a mask pattern is acquired by a scanning electron microscope (SEM), and a pattern outline is extracted from the image in order to run a lithographic simulation to find whether a desired lithographic margin can be obtained, thereby inspecting whether a mask pattern is finished in desired dimensions. The greatest advantage of this method is that the mask pattern can be judged in a state significantly close to a condition of the actual use in which a wafer is exposed, so that the management does not become unnecessarily rigorous or loose, and necessary and sufficient management can be conducted.
However, inadequacies have appeared even in this method from the viewpoint of accuracy in connection with the more rigorous dimensional management of masks in recent years. The reason is that the numerical aperture (NA) of a wafer exposure apparatus has increased and the influence of the sidewall angle of the mask pattern can no longer be neglected. To be specific, the sidewall angle of the mask pattern varies depending on the coverage ratio of the mask pattern and the position within the surface of the mask. Thus, if the outlines of the patterns are uniformly extracted from the SEM image neglecting the sidewall angles as heretofore, there arise cases where the results of a lithographic simulation from the outline data do not correspond to the exposure results of actual wafer.
It is to be noted that W. C. Wang et al., “Mask pattern fidelity quantification method” SPIE Vol. 5256(2003), p.p. 266-275 describe quantitative evaluation of mask quality in the fidelity of a 2D pattern and a method of evaluating the validity of an OPC model.